发明名称 Fast computation of overflow flag in a bit manipulation unit
摘要 A bit manipulation unit (BMU) scales and formats data and includes fast computation of the overflow flag. For fast computation the BMU's overflow flag is computed based on the input data and the shift amount. The overflow flag is calculated separately as either a LMVleft for an arithmetic shift left operation or LMVright for an arithmetic shift right operation. For an arithmetic shift left operation, LMVleft may be computed by first adding one plus the number of guard bits in the input data to the shift amount, and then detecting the number of redundant sign bits. For an arithmetic shift right operation, LMVright may be computed by checking the input redundant sign bits plus the right shift amount. By computing the overflow flag separately as LMVleft and LMVright for arithmetic left and right shifts, respectively, the overflow flag LMV is determined in parallel with the barrel shift operation and so does not depend on the result from the barrel shift operation. Consequently, an advantage of employing this technique in a BMU may be a relative reduction in the time necessary for a BMU to calculate the overflow flag.
申请公布号 US6819971(B1) 申请公布日期 2004.11.16
申请号 US20000602555 申请日期 2000.06.23
申请人 AGERE SYSTEMS INC. 发明人 ALIDINA MAZHAR M.;GOLDOVSKY ALEXANDER
分类号 G06F5/01;(IPC1-7):G06F7/38 主分类号 G06F5/01
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