发明名称 INPUT BUFFER, IN WHICH AN INVERTER FOR A DELAY IS UNNECESSARY
摘要 PURPOSE: An input buffer is provided to control the delay of the output signal by controlling the power voltage applied to the buffer and the current due to the ground voltage, so the inverter used for the delay is unnecessary. CONSTITUTION: An input buffer includes a first level adjustment unit(311), a second level adjustment unit(312), a variable buffer(320) and a synchronization output terminal(330). The first level adjustment unit(311) applies the first control voltage having a plurality of levels. The second level adjustment unit(312) applies the second control voltage having a plurality of levels. The variable buffer(320) controls the amount of operational current by the first control voltage and controls the amount of operational current in response to the ground voltage by the second control voltage. The variable buffer(320) obtains the differential component of the reference voltage and the input voltage and outputs the buffer output signal having a logic step according to the code of the differential component. And, the synchronization output terminal(330) outputs by receiving the output signal of the variable buffer(320) and being synchronized.
申请公布号 KR20040095957(A) 申请公布日期 2004.11.16
申请号 KR20030026990 申请日期 2003.04.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, YUN SAENG
分类号 G11C7/10;(IPC1-7):G11C7/10 主分类号 G11C7/10
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