发明名称 BIT LINE SENSING METHOD HAVING UNIFORM BIT LINE SENSING TIME WITHOUT REGARD TO VARIATION OF EXTERNAL POWER SUPPLY VOLTAGE AND MEMORY DEVICE FOR THE SAME
摘要 PURPOSE: A bit line sensing method and a memory device for the same are provided, which have a uniform bit line sensing time without regard to variation of an external power supply voltage. CONSTITUTION: According to a timing diagram related to a bit line sensing operation, control signals(wlstd,wlstd_ses) are generated from an active signal(pxact) by an external voltage(Vext). And a control signal(sest) is generated from the control signal(wlstd_ses) by a core voltage(Vcore). A sensing timing control unit uses the core voltage, and the control signal(sest) is inputted to a sense amp control unit using the external voltage, and thus the output signal(sest) of the sensing timing control unit is shifted to a voltage level corresponding to the external voltage(Vext).
申请公布号 KR20040093841(A) 申请公布日期 2004.11.09
申请号 KR20030027684 申请日期 2003.04.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOON, JUN YEOL
分类号 G11C7/06;G11C11/4091;(IPC1-7):G11C11/409 主分类号 G11C7/06
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