发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE TO REDUCE WRITE VOLTAGE AND PERFORM HIGH SPEED OPERATION |
摘要 |
<p>PURPOSE: A non-volatile semiconductor memory device is provided to reduce a write voltage and perform a high speed operation by increasing the capacitance between a control gate and a floating gate. CONSTITUTION: A floating gate(15) runs in parallel with the first direction on a semiconductor substrate, formed on the semiconductor substrate by interposing a gate insulation layer(14) and having a cross section cut along the plane vertically extending to the semiconductor substrate. The floating gate includes a bottom surface in contact with the gate insulation layer and two slopes extending from both ends of the bottom surface upward. A pair of control gates(17) come in contact with an insulation layer(16) between gates formed on the two slopes of the floating gate.</p> |
申请公布号 |
KR20040093433(A) |
申请公布日期 |
2004.11.05 |
申请号 |
KR20040029054 |
申请日期 |
2004.04.27 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SAKUI KOJI;SHIROTA RIICHIRO;ARAI FUMITAKA;ICHIGE MASAYUKI |
分类号 |
H01L21/8247;G11C16/04;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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