MEMORY MANAGEMENT IN A DATA PROCESSING SYSTEM

摘要

Memory management in a data processing system (10) is achieved by using one or more timing bits (54) to specify a timing parameter of a memory (18, 19, 34). To implement this in some embodiments of the present invention, a memory array (32, 33, 42) is multiple-mapped in the physical memory map (70) of processor (12) and the address bits (54) associated with the multiple-mapping are used to directly control timing parameters of the memory arrays (32, 33, 42). This allows for flexible timing specifications to be derived quickly on an access by access basis without requiring any additional control storage overhead.