发明名称 |
RECONFIGURABLE PROCESSOR ARRAY EXPLOITING ILP AND TLP |
摘要 |
A processing system according to the invention comprises a plurality of processing elements, and the plurality of processing elements comprises a first set of processing elements and at least a second set of processing elements. Each processing element of the first set comprises a register file and at least one instruction issue slot, and the instruction issue slot comprises at least one functional unit. This type of processing element is dedicated for executing a thread with no or a very low degree of instruction-level parallelism. Each processing element of the second set comprises a register file and a plurality of instruction issue slots, and each instruction issue slot comprising at least one functional unit. This type of processing element is dedicated for executing a thread with a large degree of instruction-level parallelism. All processing elements are arranged to execute instructions under a common thread of control. The processing system further comprises communication means arranged for communication across the processing elements. In this way the processing system is capable of exploiting both thread-level parallelism and instruction-level parallelism in an application, or a combination thereof. |
申请公布号 |
WO2004092949(A2) |
申请公布日期 |
2004.10.28 |
申请号 |
WO2004IB50410 |
申请日期 |
2004.04.08 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V.;DE OLIVEIRA KASTRUP PEREIRA, BERNARDO |
发明人 |
DE OLIVEIRA KASTRUP PEREIRA, BERNARDO |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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