发明名称 Semiconductor memory device
摘要 A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.
申请公布号 US2004214355(A1) 申请公布日期 2004.10.28
申请号 US20030626718 申请日期 2003.07.25
申请人 MIURA HIDEO;OGASAWARA MAKOTO;MASUDA HIROO;MURATA JUN;OKAMOTO NORIAKI;MURATA JUN;OKAMOTO NORIAKI 发明人 MIURA HIDEO;OGASAWARA MAKOTO;MASUDA HIROO;MURATA JUN;OKAMOTO NORIAKI;MURATA JUN;OKAMOTO NORIAKI
分类号 H01L21/762;H01L27/08;(IPC1-7):H01L21/66 主分类号 H01L21/762
代理机构 代理人
主权项
地址