| 摘要 |
An inverter which comprises a direct voltage intermediate circuit consisting of a positive (Udc+) and a negative (Udc-) voltage busbar, and an auxiliary voltage source (1) which generates auxiliary voltages (U1, U2, U3) referenced to the positive (Udc+) and the negative (Udc-) voltage busbar of the direct voltage intermediate circuit, the inverter also comprising for each phase an upper (2) and a lower (3) power semiconductor, which are connected in series between the positive and the negative voltage busbar, the point between the semiconductors forming the phase output (Uout) of the inverter, an upper (4) and a lower (5) gate driver the outputs (8,9) of which are connected to the control electrode (G) of the respective upper (2) and lower (3) power semiconductors and which comprise a positive (6) and a negative (7) auxiliary voltage input and a zero potential point (Com), which is connected to the output electrode (E) of the power semiconductor to be controlled, a first diode (D1) the anode of which is connected to the positive auxiliary voltage (U2) referenced to the negative voltage busbar (Udc-) and the cathode to the positive auxiliary voltage input (6) of the upper gate driver (4), and a first capacitor (C1) which is connected between the positive auxiliary voltage input (6) of the upper gate driver (4) and the zero potential point (Com). The inverter also comprises for each phase another diode (D2) the anode of the which is connected to the negative auxiliary voltage input (7) of the upper gate driver and the cathode to the negative auxiliary voltage (U3) referenced to the positive busbar (Udc+), and another capacitor (C2) which is connected between the negative auxiliary voltage input (7) and the zero potential point (Com) of the upper gate driver (4). <IMAGE> |
