| 摘要 |
PROBLEM TO BE SOLVED: To provide the demodulator in which it is prevented that the decoding reaches an undesired extent thereby suppressing increase in an arithmetic operation amount. SOLUTION: The demodulator in a time division multiplex address communication system having a synchronization detection means 3 applying synchronization detection to a reception signal received by a reception window 2 with rough time accuracy, a memory 5 storing data of the reception signal subject to synchronization detection and a decoding means 6 reading data from the memory and decoding them is provided with a slot head detection means 7 that obtains a slot synchronization symbol from the reception signal subject to synchronization detection by the synchronization detection means and detects a head position of its own slot. Then only data after the head position of its own slot detected by the slot head detection means are decoded among reception signals received by the reception window. Thus, the arithmetic operation amount is reduced by avoiding excess decoding. |
