Variable state save formats based on operand size of state save instruction

摘要

A processor supports at least two different state save formats. Each format stores state in the form that the state exists in one or more operating modes of the processor. The operand size of the state save and state restore instructions may be used to indicate which state format is assumed by the processor during execution of the state save and state restore instructions. In one implementation, the processor implements a processor architecture compatible with the x86 architecture with enhancements to support 64 bit addressing and processing. In modes in which 64 bit addressing is supported, segmentation is not used. In 32 bit and 16 bit modes, segmentation is used. Thus, the address of a floating point instruction and/or operand may be indicated by a segment selector or pointer or by a pointer only.