发明名称 Method of manufacturing SRAM having asymmetric silicide layer
摘要 The present invention relates to a structure of a static random access memory (SRAM) having an asymmetric silicide layer and a method for manufacturing the same. The method for manufacturing a static random access memory (SRAM) having an asymmetric silicide layer, wherein the SRAM is provided with transfer transistors and actuating transistors, the method including the steps of: preparing a semiconductor substrate provided with a low structure of a predetermined configuration; forming gate electrodes of the transfer transistors and the actuating transistors on the semiconductor substrate with being spaced by a predetermined distance; forming spacers on side walls of the transfer transistors and the actuating transistors; forming the transfer transistors implanting impurities into a portion of the semiconductor substrate between the gate electrodes and source/drains of the actuating transistors; forming a silicide blocking layer on a top of regions of the transfer transistors; and forming a silicide layer on a top of gate electrodes of the actuating transistors and a surface of source/drain electrodes.
申请公布号 US2004207028(A1) 申请公布日期 2004.10.21
申请号 US20040844181 申请日期 2004.05.12
申请人 HYNIX SEMICONDUCTOR INC. 发明人 MIN BYUNG-HO
分类号 H01L21/28;H01L21/8234;H01L21/8238;H01L21/8244;H01L27/088;H01L27/092;H01L27/10;H01L27/11;(IPC1-7):H01L29/76 主分类号 H01L21/28
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