MEMORY ACCESS CONTROLLER

摘要

PROBLEM TO BE SOLVED: To efficiently and simply control a memory access by improving bus bandwidth of a memory without impairing the performance of a processor or a DMA controller. SOLUTION: An access distributing device 106 distributes access requests from a plurality of bus masters 101 to 104 to buffering devices 107 to 110 to accept the access requests as an access request job preferentially. A scheduling device 111 performs access control of the access request job accepted by the buffering devices 107 to 110 to an external memory device 105 so as to be subjected to a multi-bank operation. This enables the plurality of bus masters 101 to 104 issue the access request jobs one after another without delay. COPYRIGHT: (C)2005,JPO&NCIPI