| 摘要 |
A semiconductor integrated circuit device includes a P type substrate. An N-channel MOS transistor, a P-channel MOS transistor, and an MOS type varactor element are provided in the upper surface of the P type substrate. A gate insulating film of the MOS type varactor element is thinner than gate insulating films of the N-channel MOS transistor and the P-channel MOS transistor. Also, a maximum gate voltage applied between a well terminal and a gate terminal of the MOS type varactor element is lower than a maximum gate voltage applied to the N-channel MOS transistor and the P-channel MOS transistor.
|
