发明名称 |
STRUCTURE OF FLASH MEMORY DEVICE SUITABLE FOR MULTI-LEVEL PROGRAM METHOD USING TWO PROGRAM GATES AND FABRICATING METHOD THEREOF |
摘要 |
PURPOSE: A structure of a flash memory device and a fabricating method thereof are provided to improve speed of a tunneling program method and perform a multi-level program by using two program gates in a program. CONSTITUTION: A plurality of highly-doped buried regions(31) are formed in a predetermined interval on a semiconductor substrate. A plurality of isolation oxide layers(32) are formed vertically to the highly-doped buried regions. Two program gates(33a) are formed on one isolation oxide layer. The program gates overlap partially with the highly-doped buried regions overlaps. A plurality of floating gates(35a) are arranged on the isolation oxide layer between the highly-doped buried regions. A plurality of control gates(39a) are formed between the highly-doped buried regions including the floating gates. A plurality of erasion gates are formed between the control gates.
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申请公布号 |
KR100447218(B1) |
申请公布日期 |
2004.10.14 |
申请号 |
KR19970004161 |
申请日期 |
1997.02.12 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHOI, TAE HO |
分类号 |
H01L27/112;(IPC1-7):H01L27/112 |
主分类号 |
H01L27/112 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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