发明名称 |
METHOD FOR FORMING OVERLAY MARK OF SEMICONDUCTOR DEVICE BY SELF-ALIGNMENT METHOD WITHOUT ADDITIONAL ETCH PROCESS |
摘要 |
PURPOSE: A method for forming an overlay mark of a semiconductor device is provided to facilitate a process for fabricating the semiconductor device by forming a larger trench in the position of a measurement mark region and by forming a measurement mark in the trench wherein the overlay mark with a step is formed by a self-alignment method without an additional etch process. CONSTITUTION: A trench is formed which includes an overlay mark region of a semiconductor substrate(41). A predetermined thickness of a lower insulation layer(45) is formed on the resultant structure and is patterned by using an exposure mask for an outer box. A predetermined thickness of a conductive layer(47) is formed on the resultant structure. A predetermined thickness of an interlayer dielectric(49) is formed on the resultant structure. An opaque layer(51) is formed on the interlayer dielectric. The outer box that is formed by transcribing a step formed in the lower part of the trench is fabricated by the lower insulation layer. An inner box(53) is formed in the center of the outer box.
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申请公布号 |
KR20040086857(A) |
申请公布日期 |
2004.10.13 |
申请号 |
KR20030017948 |
申请日期 |
2003.03.22 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
KIM, SEOK GYUN |
分类号 |
H01L21/027;(IPC1-7):H01L21/027 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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