| 摘要 |
A multi-phase synchronous buck converter manufacturable using MCM architecture having improved output current sharing capability. The device is constructed of a plurality of single phase buck converter stages, and a sensing circuit for each converter stage to generate an output signal representative of the output current provided by that converter stage. A master controller provides duty cycle control signals in a predetermined phase relationship for the switching transistors of the individual converter stages according to the difference between the output voltage from the multi-phase converter and a reference signal representing a desired voltage at the output node. A duty cycle trimming controller which may include individual duty cycle trimming circuits coupled between the master controller and the drive circuits for each converter stage, modifies the duty cycle control signals from the master controller to equalize as nearly as possible the currents provided by each stage. A current sharing controller provides control signals to the duty cycle trimming controller. This functions to provide a difference signal between the actual current output of a particular stage and either the average of all the stage currents, the smallest stage current, or the largest stage current.
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