发明名称 |
Apparatus and method for clock adjustment in receiver of communication system |
摘要 |
An apparatus and method for clock adjustment in a receiving end of a communication system. The receiving end includes an analog to digital converter (ADC) and a frequency/phase error estimator. The ADC receives a transmitting signal and converts to a digital signal. The frequency/phase error estimator receives the digital signal and accordingly outputs a phase error signal. The device for clock adjustment includes a shaping filter and a phase adjuster. The shaping filter outputs a phase adjustment signal in accordance with the phase error signal and has a noise shaping property. The phase adjuster is connected to the shaping filter for outputting a clock signal in accordance with the phase adjustment signal.
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申请公布号 |
US2004196937(A1) |
申请公布日期 |
2004.10.07 |
申请号 |
US20040793834 |
申请日期 |
2004.03.08 |
申请人 |
REALTEK SEMICONDUCTOR CORP. |
发明人 |
WANG WEN-CHI;HUANG JUI-CHENG;CHIEH-CHUAN CHIN;WANG HSIN-MIN |
分类号 |
H03L7/091;H03L7/099;H04L7/02;(IPC1-7):H04L25/00 |
主分类号 |
H03L7/091 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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