| 摘要 |
A memory/storage device has a number of storage cells (SZ) and includes a read-amplifier (LV), by means of which, on the basis of the magnitude and/or the direction of current flow between the read-amplifier and the storage cell at the time of read-out, the content of the relevant memory cell can be ascertained. The input resistance of the read-amplifier is variable, and the read-amplifier is specifically designed so that its input resistance is varied by a variation in the dimensioning (size) of selected read-amplifier components. The read-amplifier (LV) is arranged, on the input side, with a symmetrically designed amplifier stage with two identical amplifier branches (VZ1,VZ2).
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