| 摘要 |
An architecture for a high bandwidth digital cross-connect switching system that is internally non-blocking, has a simpler layout, and employs a reduced number of logic gates. The high bandwidth digital cross-connect switching architecture comprises a Time Division Multiplexing (TDM) cross-connect including M space/time switches. Each space/time switch includes an input bus, an output bus, NxW Flip-Flops (FFs) for storing input data, W N-by-N switches for sorting the data according to predetermined cross-connection requirements, and NxW FFs for storing output data, in which "N" corresponds to the number of input ports and the number of output ports in the N-by-N switch, and "W" corresponds to the width of each data word. Each N-by-N switch includes NxW N-to-1 selectors, and the M space/time switches include NxW M-to-1 selectors, thereby allowing an effective NxM-to-1 selection to be performed on the data words.
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