发明名称 Reception apparatus for receiving time-division signal
摘要 An initial value register stores gain control amount initial value at the start of a reception frame. At the start of reception frame, a latch unit outputs the value of the gain control amount initial value that has been taken in from initial value register and latched at the end of previous reception frame as a gain control value. A variable gain amplifier amplifies a signal received from mixer in accordance with this initial value. Thereafter, the gain of variable gain amplifier is controlled by a feedback loop structured with an RSSI circuit, a gain control circuit, and a D/A converter circuit, such that the signal level of a reception signal is stabilized at a prescribed level.
申请公布号 US2004190653(A1) 申请公布日期 2004.09.30
申请号 US20030665468 申请日期 2003.09.22
申请人 RENESAS TECHNOLOGY CORP. 发明人 YASUI IKUO;SATO HISAYASU
分类号 H04L5/16;H03G3/20;H04B1/16;H04J3/00;H04L5/14;(IPC1-7):H04L27/08 主分类号 H04L5/16
代理机构 代理人
主权项
地址