| 摘要 |
PROBLEM TO BE SOLVED: To solve a problem that use efficiency of hardware is poor and effective performance is lowered since a conditional execution instruction is executed as a non-operation instruction when conditions are not established in the conditional execution instruction. SOLUTION: A processor judges execution conditions by decoding the larger number of instructions than the number of mounted arithmetic units in an instruction issuance control part 140 before an execution stage, regarding an instruction of which the conditions are false, invalidates the instruction itself. After invalidation of the instruction by an execution instruction selection control part 141, a group of instructions are inputted in an instruction coupling part 142. In the instruction coupling part, whether or not a plurality of instructions can be coupled as one combined instruction is detected and when the instructions can be coupled, changes them to a new combined instruction. The compiler performs scheduling so that the number of instructions of which the execution conditions become true does not exceed an upper limit of parallelism of hardware. Allocatability judgment is performed in consideration not only of exclusivity of the execution conditions but of possibility of instruction coupling about all combination. COPYRIGHT: (C)2004,JPO&NCIPI
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