发明名称 |
METHOD FOR ALIGNING SEMICONDUCTOR SUBSTRATE TO DECREASE OCCURRENCE OF ALIGN FAIL |
摘要 |
PURPOSE: A method for aligning a semiconductor substrate is provided to reduce fabricating cost of each chip formed in a semiconductor substrate by decreasing the occurrence of an align fail in semiconductor align equipment and by reducing an interval of fabricating time or test time. CONSTITUTION: A semiconductor substrate is mounted on the semiconductor align equipment(100). A chip alignment is performed by using the semiconductor align equipment to select the center chip in the semiconductor substrate and to check the position coordinates of the center chip(120). A semiconductor substrate alignment is performed by using the semiconductor align equipment to move the semiconductor substrate and to check the position coordinates of a predetermined chip located in the semiconductor substrate(130). At least two reference templates in the center chip is selected, and the images and position coordinates of the reference templates are stored in the semiconductor align equipment by using the semiconductor align equipment. The position coordinates of the chips is identified by the semiconductor align equipment.
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申请公布号 |
KR20040082893(A) |
申请公布日期 |
2004.09.30 |
申请号 |
KR20030017597 |
申请日期 |
2003.03.20 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HWANG, SEON I;KIM, WON SEOP;PARK, SEONG SU |
分类号 |
H01L21/027;H01L21/00;H01L21/68;(IPC1-7):H01L21/027 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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