发明名称 |
Circuit for asynchronous reset in current mode logic circuits |
摘要 |
A current mode logic (CML) flip flop includes a first CML latch and a second CML latch. A plurality of pull-up switches are responsive to a reset signal. Outputs of the first and second CML latches are pulled up to a supply voltage through the pull-up switches. The first CML latch includes a first pull-up isolation switch driven by the reset signal for resetting the latch.
|
申请公布号 |
US6798249(B2) |
申请公布日期 |
2004.09.28 |
申请号 |
US20020303974 |
申请日期 |
2002.11.26 |
申请人 |
BROADCOM CORPORATION |
发明人 |
WONG TAK YING;HO DAVID;LEE WEE TECK;LOW KHIM LENG |
分类号 |
H03K3/356;(IPC1-7):H03K19/094 |
主分类号 |
H03K3/356 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|