发明名称 CIRCUIT FOR RECEIVING HIGH-SPEED INPUT SIGNAL
摘要 PROBLEM TO BE SOLVED: To provide a high-speed receiving circuit which is hardly affected by an input signal. SOLUTION: An input integration circuit is provided in an input stage, and a pair of input signals is integrated and sampled in a sampling period. When the sampling period is over, a sampling clock interrupts a discharge current to make a pair of input transistors to be nonconductive, separating a differential amplification circuit for level detection from the input signals. Therefore, it is possible to perform stable level detection without being affected by an input signal of the next phase. Since a switch transistor is made conductive and nonconductive by the sampling clock, the switch transistor is not made semiconductive by a high-speed clock as in the conventional transfer gate. Further, even in an input signal with small amplitude, level difference of the input signal can be stably sampled by an integration circuit operation that discharges capacity. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004266403(A) 申请公布日期 2004.09.24
申请号 JP20030052429 申请日期 2003.02.28
申请人 FUJITSU LTD 发明人 DOI YOSHIYASU
分类号 H03K17/00;H03K3/356;H03K19/0175;H04L25/02;(IPC1-7):H03K19/017 主分类号 H03K17/00
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