发明名称 |
Cold spare circuit for CMOS output circuit |
摘要 |
A first cold spare circuit has first and second transistors, and a second cold spare circuit has third and fourth transistors. The first transistor has a gate controlled by a function of a first chip. A second transistor has its source and drain connected in series with the source and drain of the first transistor between the output and a first potential terminal. A third transistor has a gate controlled by a function of a second chip. A fourth transistor has its source and drain connected in series with the source and drain of the third transistor between the output and a second potential terminal. A first control circuit controls the gate of the second transistor and a second control circuit controls the gate of the fourth transistor so as to turn on one of the second and fourth transistors at a time.
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申请公布号 |
US6794925(B1) |
申请公布日期 |
2004.09.21 |
申请号 |
US20030463313 |
申请日期 |
2003.06.17 |
申请人 |
HONEYWELL INTERNATIONAL, INC. |
发明人 |
FULKERSON DAVID E. |
分类号 |
G06F11/16;(IPC1-7):G06F11/16 |
主分类号 |
G06F11/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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