SEMICONDUCTOR DEVICE WITH DUAL GATE SPACER AND MANUFACTURING METHOD THEREOF TO REDUCE RESISTANCE

摘要

PURPOSE: A semiconductor device with a dual gate spacer and a manufacturing method thereof are provided to reduce resistance and to obtain high-speed operation and good data-resolution by forming the gate spacer on an etch stop layer to increase the contact area between a conductive pad and a substrate. CONSTITUTION: A plurality of gate patterns are formed on a semiconductor substrate(50). An etch stop layer(56) is formed on the resultant structure. A lower spacer(62) and an upper spacer(60) are vertically stacked at sidewalls of the gate patterns with the etch stop layer. An interlayer dielectric(64) is formed on the resultant structure. A conductive pad(68) is formed to connect the substrate through the interlayer dielectric and the etch stop layer.