Clock generator for microprocessor and radio communication channel, has pulse forming circuit transforming pilot signal to clock signal with preset duty cycle, and differential amplifier and transistor supplying regulated voltage

摘要

The generator has a pulse forming circuit to transform an alternating pilot signal (in ana) generated by an oscillator (2), into an impulsive clock signal (out r2r) with 50 percent duty cycle. The pilot signal controls the input of one inverter (i2), and the output of another inverter (i3) provides the clock signal. A circuit including a differential amplifier (G) and a transistor (M) supplies a regulated voltage (V reg) to the inverters as a function of the signals appearing at the outputs of the inverters.