摘要 |
PROBLEM TO BE SOLVED: To expedite the low power consumption of a system as a whole without causing an increase in cost in both the standby state and the active state of a signal processing circuit. SOLUTION: A clock for the signal processing circuit is commonly used as a drive clock of a power supply circuit 3, a clock frequency is made variable depending on the operation state of the signal processing circuit 2, and optimum control is performed in accordance with the operation state of the signal processing circuit 2. The power supply circuit 3 is thereby improved in efficiency relative to a wide-range load current value, and the low power consumption of the system is expedited as a whole. COPYRIGHT: (C)2004,JPO&NCIPI
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