发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, DESIGN AUTOMATING DEVICE AND METHOD, AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which suppresses and reduces an increase in the delay of a test signal interconnected along a chip periphery and the deterioration of a waveform dullness, can adjust the delay, and is suitable for applying to ASIC, etc. SOLUTION: A chip peripheral part has a region (called the "I/O region") for arranging I/O cells (11, 12, 13), a signal wiring for propagating the test signal to a plurality of the I/O cells is provided along a layout direction of the I/O cells, at least one empty cell (16, 17) of the empty cells not provided with the I/O cells of the I/O region configures a propagation path of the signal, and a repeater circuit 25 for receiving the signal to drive to output it is provided. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004260093(A) 申请公布日期 2004.09.16
申请号 JP20030051469 申请日期 2003.02.27
申请人 NEC ELECTRONICS CORP 发明人 HISAIE HIROYOSHI;OBARA YOSHIHIRO
分类号 G01R31/28;G01R31/3185;G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 主分类号 G01R31/28
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