发明名称 CLOCK ERROR DETECTION CIRCUIT AND ITS DETECTION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a clock error detection circuit and its detection method for detecting a clock error without requiring any separate special clock input excepting the inspected clock. SOLUTION: This clock error detection circuit is provided with delay means 102 and 103 delaying the inspected clock 101 by a fixed time, clock condition storage means 104 and 105 storing a condition after the lapse of a fixed time of the inspected clock on the basis of output signals from the delay means, and determination means 107 and 108 detecting an error of the inspected clock by comparing and determining output from the clock condition storage means with an output expected value after the lapse of the fixed time of the inspected clock. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004252834(A) 申请公布日期 2004.09.09
申请号 JP20030044112 申请日期 2003.02.21
申请人 SHARP CORP 发明人 MATSUOKA KAZUYUKI
分类号 G01R29/02;G01R29/027;G01R31/319;G06F1/04;H03K5/19;(IPC1-7):G06F1/04 主分类号 G01R29/02
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