Synchronous rectifier back bias control circuit

摘要

A circuit is disclosed that efficiently prevents the turning on of the synchronous rectifier in a buck converter during a predetermined condition, so as to prevent current reversing through the synchronous rectifier during that time. In one embodiment, the present invention provides control of the synchronous rectifier during the soft-start time for a non-isolated DC-DC buck converter, thereby preventing current reversing (sinking) during its soft start process. In another embodiment of the present invention, a circuit uses a signal indicative of a soft-start condition for a converter to prevent the turning on of the synchronous rectifier during the soft-start time. The present invention also solves the aforementioned synchronous rectifier back bias problem for converters used in a paralleled converter configuration.