| 摘要 |
PROBLEM TO BE SOLVED: To provide a DMA controller which reduces load of a CPU so as to be able to perform de-multiplex processing of time division multiplexing packet data stream received without intervention of CPU processing, concerning a DMA controller used by a data receiver-transceiver which performs receiving and transmitting of time division multiplexing packet data stream, and which can easily correspond to introduction of high speed transfer rate data communication, multi-channels multiplexing data communication, and a real time OS. SOLUTION: The DMA controller is provided with control means (13A, 13B, 14A, 14B, 19, 20, 22, 24, and 25) which control switching of data transfer destination so as to count the number of transfer bytes with every packet data transferred by DMA from the receiving and transmitting part of a receiver-transceiver to a data transfer destination, and so as to de-multiplex the received time division multiplexing packet data stream to individual packet data stream. COPYRIGHT: (C)2004,JPO&NCIPI
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