发明名称 |
METHOD FOR COMPILING, COMPILER, COMPILATION DEVICE, PROGRAM CODE CREATION METHOD, PROGRAM, CALCULATION METHOD AND DEVICE FOR OPTIMUM UTILIZATION OF CACHE |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for compiling that reduces a total cache miss including a cache line conflict and improves processing speed, a compiler, a compilation device, a program code creation method, a program, a calculation method of optimum utilization of cache and a calculation device for optimum utilization of cache. SOLUTION: Scheduling sequentially carries out each small loop belonging to the same data localizable group (DLG) as much as possible after loop alignment and partitioning, and by executing layout change of array data used by each DLG using a padding, allocates a plurality of partial array data used by each small loop belonging to the same DLG on a cache without them being overlapped. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004252728(A) |
申请公布日期 |
2004.09.09 |
申请号 |
JP20030042628 |
申请日期 |
2003.02.20 |
申请人 |
UNIV WASEDA |
发明人 |
KASAHARA HIRONORI;ISHIZAKA KAZUHISA;NAKANO HIROSHI;OBATA MOTOKI |
分类号 |
G06F9/45;(IPC1-7):G06F9/45 |
主分类号 |
G06F9/45 |
代理机构 |
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地址 |
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