发明名称 Asynchronous data transfer between logic box with synchronization circuit
摘要 In a semiconductor integrated circuit, a plurality of logic blocks formed on a semiconductor chip are respectively operated in sync with clock signals unique to the plurality of logic blocks. Data transfer between the plurality of logic blocks is performed in asynchronous transfer scheme.
申请公布号 US6788109(B2) 申请公布日期 2004.09.07
申请号 US20020160109 申请日期 2002.06.04
申请人 NEC CORPORATION 发明人 KITAGAWA KENJI
分类号 G06F1/10;G06F1/12;G06F5/06;H03K19/0175;H03L7/00;H04L7/00;(IPC1-7):H03K19/00 主分类号 G06F1/10
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