发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce power consumption of a semiconductor integrated circuit adopting a multi-threshold voltage CMOS technology in a power saving mode. SOLUTION: A first switch interrupts connection of a virtual power line to a normal power line in response to activation of a switch control signal at the time of switching from a normal operation mode to a power saving mode. To a first circuit block connected with the virtual power line, supply of power supply voltage is stopped in the power saving mode. A second switch of a floating prevention circuit connects a connection node between the output of the first circuit block and the input of a second circuit block with a first voltage line on receiving inactivation of the switch control signal in the power saving mode. Thus, the input of the second circuit block is prevented from floating even when the power supply voltage is not supplied to the first circuit block. Consequently, flow of through current in the second circuit block is prevented and increase of the power consumption is prevented in the power saving mode. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004248143(A) 申请公布日期 2004.09.02
申请号 JP20030037894 申请日期 2003.02.17
申请人 FUJITSU LTD 发明人 YOKOZEKI WATARU
分类号 H01L27/04;F02M51/00;G11C5/14;G11C11/22;H01L21/822;H03K19/0948;(IPC1-7):H03K19/094 主分类号 H01L27/04
代理机构 代理人
主权项
地址
您可能感兴趣的专利