发明名称 |
Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices |
摘要 |
A method for forming interconnect structures in a magnetic random access memory (MRAM) device includes defining an array of magnetic tunnel junction (MTJ) stacks over a lower metallization level. A encapsulating dielectric layer is formed over the array of MTJ stacks and the lower metallization level. Then, a via opening is defined in the encapsulating dielectric layer, and a planar interlevel dielectric (ILD) layer is deposited over the encapsulating dielectric layer and within the via opening. Openings are then formed within ILD layer, over the array of MTJ stacks and the via opening.
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申请公布号 |
US6784091(B1) |
申请公布日期 |
2004.08.31 |
申请号 |
US20030250133 |
申请日期 |
2003.06.05 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;INFINEON TECHNOLOGIES, AG |
发明人 |
NUETZEL JOACHIM;ARNDT CHRISTIAN;COSTRINI GREG;GAIDIS MICHAEL C.;NING XIAN JAY |
分类号 |
H01L21/768;H01L21/8246;H01L27/22;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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