| 摘要 |
<P>PROBLEM TO BE SOLVED: To perform the phase control of a pixel clock synchronized in phase by a simple constitution. <P>SOLUTION: This pixel clock producing circuit is equipped with a means 11 for producing a high periodic clock VCLK, a means 15 for outputting a horizontal synchronizing signal which shows the output start timing of the pixel clock as a phase synchronizing signal synchronized with VCLK, a means 12 for detecting the rising or falling of the phase synchronizing signal or the pixel clock PCLK and outputting a pulse signal with one clock width of UCLK as a detection signal, a means 13 for producing control signals (a) and (b) based on phase data for indicating the transition timing of the detection signal and PCLK, and a means 14 for performing the transition of the pixel clock based on the control signals (a) and (b). <P>COPYRIGHT: (C)2004,JPO&NCIPI |
