发明名称 INSTRUCTION PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a method for generating a VLIW instruction column having high parallelism taking out a plurality of instruction flows from one or more programs: and to provide an performance means for the VLIW instruction column. SOLUTION: An instruction processing method comprises: extracting the performance starting point of the program and the continued instruction column using the branch destination of a conditional branch instruction as a starting point as one or more instruction flows from each original program (a); removing all the conditional branch instructions to form a separated and independent instruction flow (b); transforming arithmetic operation in the instruction flow into arithmetic operation performing the arithmetic operation by using data in an instruction processor or the external data to store the result in the instruction processor and arithmetic operation performing the arithmetic operation by using the data in the instruction processor or the external data, writing the result into a main storage, and determining the branch condition of the original conditional branch instruction by the value of the data in the instruction processor or that of the external data and selectively canceling the writing operation by the determination result. Each long word instruction is composed of the maximum n pieces (n is two pieces or more) by each of the arithmetic operation having 0 piece or more. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004240999(A) 申请公布日期 2004.08.26
申请号 JP20040152762 申请日期 2004.05.24
申请人 HITACHI LTD 发明人 SHIMADA KENTARO;HANAWA MAKOTO;YAMAMOTO KAZUMICHI;KAMATA EIKI;ITO MOTOHISA
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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