发明名称 |
Semiconductor device having first and second trenches with no control electrode formed in the second trench |
摘要 |
It is an object to obtain a semiconductor device capable of minimizing an increase in a gate capacity without adversely influencing an operation characteristic and a method of manufacturing the semiconductor device. A first trench (7) and a second trench (11) are formed to reach an upper layer portion of an N<-> layer (3) through a P base layer (5) and an N layer (4), respectively. In this case, a predetermined number of second trenches (11) are formed between the first trenches (7) and (7). The first trench (7) is provided adjacently to an N<+> emitter region (6) and has a gate electrode (9) formed therein. The second trench (11) has a polysilicon region (15) formed therein. The second trench (11) is different from the first trench (7) in that the N<+> emitter region (6) is not formed in a vicinal region and the gate electrode (9) is not formed therein. A trench space between the first trench (7) and the second trench (11) which are provided adjacently to each other is set to be such a distance as not to reduce a breakdown voltage. An emitter electrode (12) is directly formed on an almost whole surface of a base region (5).
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申请公布号 |
US6781199(B2) |
申请公布日期 |
2004.08.24 |
申请号 |
US20010986277 |
申请日期 |
2001.11.08 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TAKAHASHI HIDEKI |
分类号 |
H01L29/41;H01L21/331;H01L29/40;H01L29/417;H01L29/73;H01L29/739;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L29/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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