发明名称 Memory repair analysis method and circuit
摘要 A method and circuit for repairing a memory array having one or more memory segments each having one spare column and a predetermined number of spare rows common to all segments, the method comprises, while testing the memory array for failures, generating an equal number of unique segment repair solutions for each segment with each segment repair solution including one defective column address, if any, and a number of defective row addresses, if any, corresponding to the predetermined number of spare rows; and, after completing testing, analyzing all segment repair solution combinations consisting of one segment repair solution selected from each segment; and identifying the best segment repair solution combination of combinations having a number of different defective row addresses which is less than or equal to the predetermined number of spare rows.
申请公布号 US2004163015(A1) 申请公布日期 2004.08.19
申请号 US20040774512 申请日期 2004.02.10
申请人 NADEAU-DOSTIE BENOIT;ABBOTT ROBERT A. 发明人 NADEAU-DOSTIE BENOIT;ABBOTT ROBERT A.
分类号 G01R;G11C29/00;G11C29/44;H02H3/05;(IPC1-7):H02H3/05 主分类号 G01R
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