发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT ESTIMATION DEVICE
摘要 PROBLEM TO BE SOLVED: To rapidly decide whether a semiconductor integrated circuit chip can be mounted in a package or not by enabling decision of whether the chip can be mounted in the package without calculation of a layout of the a semiconductor integrated circuit. SOLUTION: When specification information about specifications of the semiconductor integrated circuit is inputted from an input device 101, a CPU 102 calculates a circuit scale of the semiconductor chip and the number of the chips collectable from one wafer, and decides whether the semiconductor integrated circuit chip can be mounted in the package or not, by use of design information (package information, a macro library, mounting macro information, layout restriction) from a magnetic disk 105, before the layout of the semiconductor integrated circuit. Thereafter, the CPU 102 reads an automatic layout rule, calculates the layout, and converts the layout into a prescribed format to output the layout. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004234187(A) 申请公布日期 2004.08.19
申请号 JP20030020176 申请日期 2003.01.29
申请人 JEDAT INC 发明人 TSUTSUMI YASUO;SUZUKI KENSUKE;KATO MASAHIRO
分类号 G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G06F17/50
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