发明名称 Apparatus, method and pattern for evaluating semiconductor device characteristics
摘要 External resistance Rsd1 is obtained using a first evaluation pattern of MOSFETs having a gate contact length Lgc1 and a channel width W1 each (in steps 100 and 102). External resistance Rsd2 is then acquired by use of a second evaluation pattern of MOSFETs having a gate contact length Lgc2 and a channel width W2 each (in steps 100 and 104). Thereafter, sheet resistance Rsh and overlapping portion resistance Rdsw of the MOSFETs are computed (in step 106) in accordance with the following expressions:
申请公布号 US6779160(B2) 申请公布日期 2004.08.17
申请号 US20030345950 申请日期 2003.01.17
申请人 RENESAS TECHNOLOGY CORP. 发明人 AMISHIRO HIROYUKI;YAMAGUCHI KENJI
分类号 G01R27/02;G01R31/26;G01R31/28;H01L21/66;(IPC1-7):G06F17/50 主分类号 G01R27/02
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