发明名称 INTERPOLATION COEFFICIENT GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an interpolation coefficient generating circuit capable of certainly responding even if a reduction ratio (a) for every line or every dot changes. SOLUTION: This interpolation coefficient generating circuit is provided with a distance input terminal inputting the distance from a target coordinate TP to a neighborhood pixel, a distance computing part calculating the distance from the target coordinate TP to each pixel of an input image existing around the target coordinate TP using the distance from the distance input terminal, a multiplier multiplying the value of each distance obtained by the distance computing part with the reduction ratio (a), a reduction ratio (a) inputting terminal inputting the reduction ratio (a) into the multiplier, a coefficient memory address generation part generating an address for selecting a filter factor from a coefficient memory using each output of the multiplier, a coefficient memory selection part selecting the filter factor by using the generated address, and a normalization part normalizing and outputting the selected filter factor. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004227485(A) 申请公布日期 2004.08.12
申请号 JP20030017439 申请日期 2003.01.27
申请人 FUJITSU GENERAL LTD 发明人 HIYOSHI TAKETO;AIDA TORU;OMORI HIDEYUKI;ONODERA JUNICHI
分类号 G06T3/40;H04N1/393;(IPC1-7):G06T3/40 主分类号 G06T3/40
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