| 摘要 |
A semiconductor integrated circuit (39) comprising: a plurality of selectable pathways (23) inter-connected between a plurality of data sources and data destinations (11, 13, 15, 17, 19); a cryptographic circuit (9) connected to the selectable pathways (23) and arranged to selectively receive data at an input (24) from at least one of the data sources, to decrypt or encrypt the data in accordance with a key, and selectively provide the encrypted or decrypted data to at least one of the data destinations via an output (26); an instruction interpreter (29) arranged to receive as an input an instruction signal (33) and to generate therefrom an output (31) to control the plurality of selectable pathways (23) to select from which of the data sources the cryptographic circuit (9) receives data and to which destination the cryptographic circuit (9) provides data; the instruction interpreter (29) being configured such that the instruction signal (33) defines a data pathway configuration of the system, and such that it operates in accordance with a rule which limits the data pathway configurations which are selectable. Preferably, the instruction interpreter (29), cryptographic circuit (9) and data pathways (23) are all contained on a single monolithic semiconductor integrated circuit (39). <IMAGE> |
