Memory cell structure integrated on semiconductor

摘要

This invention relates to a memory cell which comprises a capacitor having a first electrode and a second electrode separated by a dielectric layer. Such dielectric layer comprises a layer of a semi-insulating material which is fully enveloped by an insulating material and in which an electric charge is permanently present or trapped therein. Such electric charge accumulated close to the first or to the second electrode, depending on the electric field between the electrodes, thereby defining different logic levels.