发明名称 MEMORY CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a low-cost memory control device for reading a memory from a CPU at a high speed. SOLUTION: This memory control device starts a memory read access at the time of setting an address and stores the read data in FIFO in a signal processor so as to perform the memory read access from the CPU at a high speed. The memory write is performed via FIFO and only when there in no vacant space in the FIFO, a wait signal to the CPU is made effective so as to perform the memory write from the CPU at a high speed. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004220486(A) 申请公布日期 2004.08.05
申请号 JP20030009450 申请日期 2003.01.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 AOKI TORU;AKIZUKI MAMIKO
分类号 G06F12/00;G06F12/02;(IPC1-7):G06F12/00 主分类号 G06F12/00
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