Stress reduction package and process

摘要

An integrated circuit package (10) has a layer (22) of silicon positioned between copper die attach pad (18) and silicon integrated circuit die (12). The layer (22) should have a thickness of about half that of the silicon die (12). The layer (22) should also extend symmetrically beyond the die (12). Such an extension provides a horizontal surface beyond the die (12) to which thermosetting encapsulating resin (20) will adhere to produce an enhanced stress reduction effect. Vertical edges (23) of the layer (22) also help to prevent stress of the die (12) by resisting force from the encapsulating resin (20) after it shrinks during curing.