发明名称 Voltage buffer for capacitive loads
摘要 A voltage buffer for capacitive loads isolates the load from the feedback loop. Using a variation of a follower arrangement, a second transistor outside of the feedback loop introduced. The current to the load is supplied through the second transistor, which is connected to have the same control gate level as the transistor in the feedback loop and provide an output voltage based on the reference input voltage. The output voltage is dependent upon the input voltage, but the load is removed from the feedback loop. By removing the load from the feedback loop, the loop is stabilized with only a very small or no compensating capacitor, allowing the quiescent current of the buffer to be reduced and the settling time to be improved. One preferred use of the present invention is to drive the data storage elements of a non-volatile memory.
申请公布号 US2004150464(A1) 申请公布日期 2004.08.05
申请号 US20030356098 申请日期 2003.01.30
申请人 发明人 KHALID SHAHZAD
分类号 H03F3/45;H03F3/50;(IPC1-7):G05F1/10 主分类号 H03F3/45
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