发明名称 Multiple configuration multiple chip memory device and method
摘要 A memory integrated circuit can be used either alone or as a pair to provide a memory device having twice the capacity of the single integrated circuit. The larger capacity memory device is addressed using an extra row address bit. The extra row address bit is used either to alternately enable each of the memory integrated circuits in one configuration or is remapped to become an extra column address bit in another configuration.
申请公布号 US2004145958(A1) 申请公布日期 2004.07.29
申请号 US20030355781 申请日期 2003.01.29
申请人 MORGAN DONALD M.;MERRITT TODD A. 发明人 MORGAN DONALD M.;MERRITT TODD A.
分类号 G11C5/06;G11C8/00;G11C8/12;G11C11/408;(IPC1-7):G11C8/00 主分类号 G11C5/06
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