发明名称 Stratum clock state machine multiplexer switching
摘要 Methods include receiving a pair of input clock signals; utilizing a stratum clock state machine to control a multiplexer; utilizing the multiplexer to switch an input of a main clock between each of the pair of input clock signals; inducing a phase build-out activity; and transmitting an output clock signal.
申请公布号 US6765424(B2) 申请公布日期 2004.07.20
申请号 US20010989315 申请日期 2001.11.20
申请人 SYMMETRICOM, INC. 发明人 ZAMPETTI GEORGE;HAMILTON BOB
分类号 H03L7/07;H04J3/06;(IPC1-7):G06F1/04 主分类号 H03L7/07
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